Items where Author is "Kayle Jacqueline, Kumar"

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Shamsiah, Suhaili and Kayle Jacqueline, Kumar and Norhuzaimin, Julai and Maimun, Huja Husin and Mohd Faizrizwan, Mohd Sabri and Asrani, Lit (2020) Implementation of Verilog HDL in Calculator Design with FPGA Simulation. 2020 13th International UNIMAS Engineering Conference (EnCon).

This list was generated on Fri Mar 29 19:03:02 2024 +08.