Design of 3.1-10.6 GHz UWB CMOS Power Amplifier using Cascade Topology

Rohana, Sapawi and Dayang Halimah, Abang Ahmad and Kuryati, Kipli and Kismet, Hong Ping and Norhuzaimin, Julai and Sohiful Anuar, Zainol Murad and Dayang Nur Salmi Dharmiza, Awang Salleh and Dayang Azra, Awang Mat and Shamsiah, Suhaili and Asrani, Lit (2023) Design of 3.1-10.6 GHz UWB CMOS Power Amplifier using Cascade Topology. Journal of Advanced Research in Applied Sciences and Engineering Technology, 32 (3). pp. 190-198. ISSN 2462-1943

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Power amplifier is an important component in the wireless communication system. Design of the power amplifier in UWB transceiver is challenging as the signal need to be transmitted over a wide bandwidth. Several criteria need to be fulfilled such as good linearity, good wideband matching, high efficiency and low power consumption.This paper presents the design of a power amplifier with 3.1-10.6 GHz using 0.18 μm CMOS technology for ultra-wide band application. The proposed power amplifier used three cascaded amplifier stages in order to achieve good gain and wide-band width. The results show that the proposed power amplifier design hasan average gain of 7.28 dB, an input return loss less than -7.48 dB, an output return loss less than -4.782 dB, and group delay variation of ±151.9 ps is achieved over the entire band. A good input1dB-compression point of 6.67 dBm and input third order intercept point of 0 dBm is achieved at 5 GHz.

Item Type: Article
Uncontrolled Keywords: CMOS; power amplifier; Ultra-wideband cascade topology.
Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering
Divisions: Academic Faculties, Institutes and Centres > Faculty of Engineering
Faculties, Institutes, Centres > Faculty of Engineering
Depositing User: Awang Mat
Date Deposited: 23 Oct 2023 01:17
Last Modified: 23 Oct 2023 01:17

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