Improved Delayering Method for SOI Wafer Processing

Handie, Ahmataku and Shahrol, Mohamaddan and Mahshuri, Yusof and Aidil Azli, Alias and Kuryati, Kipli and Norhayati, Soin (2018) Improved Delayering Method for SOI Wafer Processing. 2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA), 2018. ISSN ISBN: 978-1-5386-4929-9

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Official URL: http://ieeexplore.ieee.org.remotexs.unimas.my/docu...
Item Type: E-Article
Uncontrolled Keywords: SOI, Parallel lapping, Top Silicon, Buried Oxide, Delayering Method, Wet etchant, unimas, university, universiti, Borneo, Malaysia, Sarawak, Kuching, Samarahan, ipta, education, research, Universiti Malaysia Sarawak.
Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering
Divisions: Academic Faculties, Institutes and Centres > Faculty of Engineering
Depositing User: Karen Kornalius
Date Deposited: 18 Apr 2019 07:19
Last Modified: 31 Jul 2019 03:39
URI: http://ir.unimas.my/id/eprint/24567

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