Performance of CMOS Schmitt Trigger

Rohana, Sapawi and Chee, R.L.S and Siti Kudnie, Sahari and Norhuzaimin, Julai (2008) Performance of CMOS Schmitt Trigger. International Conference on Computer and Communication Engineering, 2008. ICCCE 2008. ISSN ISBN: 978-1-4244-1691-2

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This paper presents the effect of load capacitance and source voltage on performance of proposed Schmitt trigger circuit. The proposed circuit was designed based on Conventional Schmitt Trigger by manipulating the arrangement of transistors and the width-length ratio. All simulation results have been carried out based on Microwind software on three different designs in term of propagation delay, Energy-delay Product and hystheresis. From the result, the proposed full swing CMOS Schmitt Trigger was able to operate as low voltage (0.8V-1.5V).

Item Type: Article
Uncontrolled Keywords: Trigger circuits, Propagation delay,MOSFETs,MOS devices,Capacitance,Low voltage, Hysteresis, Equations, Circuit simulation, Digital circuits, unimas, university, universiti, Borneo, Malaysia, Sarawak, Kuching, Samarahan, ipta, education, research, Universiti Malaysia Sarawak
Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering
Divisions: Academic Faculties, Institutes and Centres > Faculty of Engineering
Depositing User: Karen Kornalius
Date Deposited: 12 Jun 2017 05:51
Last Modified: 12 Jun 2017 05:51

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