Design of CMOS power amplier

Khoo, Kian Hua (2011) Design of CMOS power amplier. [Final Year Project Report] (Unpublished)

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Abstract

Power amplifier (PA) is an important component of wireless transceiver in communications system. PAuses radio frequency for transmissio n between mobile wireless infrastructures. Complementary Metal Oxide Semico nductor (CMOS) techno logy is being used for design o f system integration on chip in PA. This is due to its improved operation speed tlu·ough downsizing. Being the most power hungry component o f radio frequency (RF) front end, designing a high perio rmance power amplifier is one of the most challenging parts in the wire less transce iver. The performance o f power amp lifier can be detennined in terms of signal linea rity, output power, and power gain. A proposed PA is a single-ended class AB cascode CMOS power amplitier. The simulation too l used in this project is LTspice IY. The power amplifier is operated at 3 GHz with an input power of 8 dBm and a supply vo ltage of 3 volt This project is to design a RF CMOS power ampl ifier for mobil e communications.

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